Skip to content

VLSIFacts

Let's Program the Transistors

  • Home
  • DHD
    • Digital Electronics
    • Fault Tolerant System Design
    • TLM
    • Verification
    • Verilog
    • VHDL
    • Xilinx
  • Embedded System
    • 8085 uP
    • 8086 uP
    • 8051 uC
  • VLSI Technology
    • Analog Electronics
    • Memory Devices
    • VLSI Circuits
  • Interview
    • Interview Experience
    • Training Experience
    • Question Bank
  • Notifications
  • QUIZ
  • Community
  • Job Board
  • Contact Us

ESD Models and their comparison – ESD Part 2

Posted on January 26, 2018May 17, 2026 By Jitendra No Comments on ESD Models and their comparison – ESD Part 2

In the part-1 of ESD we learnt through of ESD testing and its importance. ICs are susceptible to ESD event as they consist of components that are very sensitive to excess current and voltage. ESD even can occur at any point in time during IC assembly and packaging, part handling or system assembly. Important point…

Read More “ESD Models and their comparison – ESD Part 2” »

VLSI Circuits, VLSI Technology

Electro-Static Discharge (ESD) – VLSI Circuit’s Prospective

Posted on January 15, 2018May 17, 2026 By Jitendra No Comments on Electro-Static Discharge (ESD) – VLSI Circuit’s Prospective

Electro Static Discharge (ESD) is sudden flow of static electricity between two electrically charged objects for a very short duration of time. The study of ESD phenomenon and its protection circuits are more relevant with each technology nodes as smaller devices are more vulnerable. Electric Over-Stress (EOS) is also one by-product of ESD which also…

Read More “Electro-Static Discharge (ESD) – VLSI Circuit’s Prospective” »

VLSI Circuits

Reliability vs. Availability in Fault Tolerance

Posted on January 3, 2018June 17, 2025 By vlsifacts No Comments on Reliability vs. Availability in Fault Tolerance

We have learnt the following definitions of Reliability and Availability from the Fault Tolerance Measures post: Reliability, R(t): Probability that the system has been up continuously during the whole interval [0,t], given it was up at time 0. This measure is suitable for applications in which even a momentary disruption can prove costly. One example is computer…

Read More “Reliability vs. Availability in Fault Tolerance” »

Fault Tolerant System Design

Kernel Modules, Major Number and Minor Number

Posted on January 1, 2018June 17, 2025 By Gautam No Comments on Kernel Modules, Major Number and Minor Number

Whenever you want to add something to the kernel code, there are two options – either add your code to the kernel code and compile/build the entire kernel image or compile your code separately and add it to the kernel image later. The first one is the earlier approach that was followed. But, considering the…

Read More “Kernel Modules, Major Number and Minor Number” »

Embedded System

Components of Device Driver

Posted on December 8, 2017June 17, 2025 By Gautam No Comments on Components of Device Driver

To interact with the hardware, driver needs to communicate with the kernel and before that, it must notify the kernel about its presence. This is achieved by the “init” call by which the driver is registered with the kernel and allocated the memory it wants. At the time of system shut down, the driver is…

Read More “Components of Device Driver” »

Embedded System

VLSI Design Flow

Posted on November 20, 2017June 17, 2025 By Pravriti 1 Comment on VLSI Design Flow

The chip design includes different types of processing steps to finish the entire flow. For each and every step, the design process requires a dedicated EDA tool. These tools have the flexibility to import or export different types of files. The picture below shows the various steps of the design flow: Here is a brief…

Read More “VLSI Design Flow” »

DHD

Fault Tolerance Measures

Posted on November 16, 2017June 17, 2025 By vlsifacts No Comments on Fault Tolerance Measures

Fault tolerance of electronic system is a major concern for the VLSI engineers. This can be realized from the post Need of Fault Tolerant VLSI System Design. The objective of this post is to introduce the proper tools for fault tolerance measure. A measure is a mathematical abstraction, which expresses only some subset of the object’s…

Read More “Fault Tolerance Measures” »

Fault Tolerant System Design

Defects, Errors, and Faults

Posted on November 13, 2017June 17, 2025 By vlsifacts No Comments on Defects, Errors, and Faults

In Electronics industry incorrectness in products are described in several ways which may create confusion in understanding the terms defect, error and fault. Though these terms are used interchangeably in the field of VLSI testing, let’s try to draw a fine boundary between the meaning of these terms. Before doing this, we should understand why…

Read More “Defects, Errors, and Faults” »

Fault Tolerant System Design

Redundancy in Fault Tolerance

Posted on November 5, 2017July 1, 2025 By vlsifacts No Comments on Redundancy in Fault Tolerance

In the previous post we have understood the need of Fault Tolerance in VLSI System Design. A VLSI system can broadly be considered as a union of following 3 layers: Designers introduce several techniques to all these system layers to deal with transient as well as permanent faults, and these techniques incorporate the concept of…

Read More “Redundancy in Fault Tolerance” »

Fault Tolerant System Design

Device Drivers : Role & Types

Posted on November 3, 2017June 17, 2025 By Gautam No Comments on Device Drivers : Role & Types

As briefly discussed in our previous article, device driver is a software that is used to control a hardware device and make it work. It acts as an interface between the user-application and the hardware. Any user-application reaches out to the device driver for any interaction with the hardware device and the device driver checks…

Read More “Device Drivers : Role & Types” »

Embedded System

Posts pagination

Previous 1 … 14 15 16 … 26 Next

Top Posts & Pages

  • AND and OR gate using CMOS Technology
  • VLSI ROADMAP (2026 Ready) — From Beginner to Job-Ready
  • Designing a Two-Stage Flip-Flop Synchronizer to Eliminate Metastability in Clock Domain Crossing
  • Lint Check in VLSI Design: Common Linting Errors and How to Fix Them
  • How to Design a Clock Divider in Verilog?

Copyright © 2026 VLSIFacts.

Powered by PressBook WordPress theme