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Aricent Technologies – Technical Interviews Question Bank – Part 5

Posted on January 19, 2016June 16, 2025 By Gautam No Comments on Aricent Technologies – Technical Interviews Question Bank – Part 5

Aricent Technologies Technical Interviews Question Bank continued from Part 4 Q-21. Give a brief description about circuit switching and packet switching. A : Circuit switching is a type of method for implementing a telecommunication network in which a dedicated path or physical connection is established before transmission of data. Dedicated connection allows full-duplex, fast, safe…

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Interview, Question Bank

Synopsys – Interview Questions – based on Synthesis and Simulation

Posted on January 19, 2016June 16, 2025 By Priyadarshi No Comments on Synopsys – Interview Questions – based on Synthesis and Simulation

This post contains some very interesting interview questions asked by Synopsys the EDA giant in its interview. The questions are based on Verilog Synthesis and Simulation. Though I have included the answers; I would encourage the reader to experiment himself or herself and then discuss these in the forum. 1. How a latch gets inferred…

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DHD, Digital Electronics, Interview, Interview Experience, Verilog

Aricent Technologies – Technical Interviews Question Bank – Part 4

Posted on January 16, 2016June 16, 2025 By Gautam No Comments on Aricent Technologies – Technical Interviews Question Bank – Part 4

Aricent Technologies Technical Interviews Question Bank continued from Part 3 Q-16. What is half-duplex channel? Give a real-life application of it. A : Half-duplex channel is a medium of communication in which the sender and receiver are capable of transmitting or receiving but not both at the same time for example, a walkie-talkie. Q-17. What…

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Interview, Question Bank

Aricent Technologies – Technical Interviews Question Bank – Part 3

Posted on January 15, 2016June 16, 2025 By Gautam No Comments on Aricent Technologies – Technical Interviews Question Bank – Part 3

Aricent Technologies Technical Interviews Question Bank continued from Part 2 Q-11. What is TDMA and FDMA? Explain their difference. A : TDMA refers to Time Division Multiple Access which is a channel multiplexing technique where users are assigned different time slots such that eight simultaneous calls can be made using the entire bandwidth. FDMA stands…

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Interview, Question Bank

Aricent Technologies – Technical Interviews Question Bank – Part 2

Posted on January 15, 2016June 16, 2025 By Gautam No Comments on Aricent Technologies – Technical Interviews Question Bank – Part 2

Aricent Technologies Technical Interviews Question Bank continued from Part 1 Q-6. What are active and passive components? Give examples of both. A : Active components are components that produce energy (in the form of voltage or current) such as transistors, while passive components consume energy like resistor, capacitor etc. Q-7. Why is input resistance of…

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Interview, Question Bank

Aricent Technologies – Technical Interviews Question Bank – Part 1

Posted on January 14, 2016June 16, 2025 By Gautam No Comments on Aricent Technologies – Technical Interviews Question Bank – Part 1

During the placement season, we all start to find all the relevant, important and frequently asked interview questions on various websites but cannot find all of them at one place. So, to help you in your campus placement drives, I have prepared a Question Bank of all the questions that were asked to me and…

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Interview, Question Bank

Interview Experience – WIPRO GMT (Global Media & Telecom ) – (On Campus – #2)

Posted on January 13, 2016May 18, 2025 By vlsifacts No Comments on Interview Experience – WIPRO GMT (Global Media & Telecom ) – (On Campus – #2)

I am Jitendra Kumar Yadav, Jaypee Institute of Information Technology. This is my interview experience for the post of Project Engineer at Wipro Limited. I have described my selection process for the mentioned post in the following content. Check here the first post on “Interview Experience – WIPRO Limited – Telecom Domain“ Technical Interview First of all I…

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Interview, Interview Experience

Training Experience – Mentor Graphics Higher Education Program

Posted on November 12, 2015June 16, 2025 By Dewansh No Comments on Training Experience – Mentor Graphics Higher Education Program

Hello Everyone! This is my training experience, I had at Mentor Graphics, Noida (Higher Education Program) which is conducted annually for pre-final year B.Tech and M.Tech students. It is a two month training program that starts in June and lasts till the last week of July. The main aim of the training is “Verification of…

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Interview, Training Experience

Case and Conditional Statements Synthesis CAUTION !!!

Posted on November 12, 2015June 16, 2025 By Priyadarshi 5 Comments on Case and Conditional Statements Synthesis CAUTION !!!

Case and Conditional Statements are available in both VHDL and Verilog. These are considered as significant features of behavioral modelling, be it in VHDL or Verilog. Behavioral modelling provides high level abstraction so that the circuit can be designed by programming its functionality. Let’s say, we have to design a circuit that selects a particular…

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DHD, Digital Electronics, Verilog

Digilent Design Contest 12th Edition

Posted on November 6, 2015May 18, 2025 By vlsifacts No Comments on Digilent Design Contest 12th Edition

Do you love to play with FPGAs? If yes, then there is a golden opportunity to showcase your talent. Digilent Design Contest Europe Region has reached its 12th Edition, with a rich history behind, many interesting and cool projects along the years, many smart and competitive participants, as well as appreciated advisers. It is held in Cluj-Napoca, Romania,…

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