We have learned from the article “addition of 2’s complement signed binary numbers” that overflow occurs if the carries into and out of MSB are different. In this article, we will solve some examples that highlight how to detect overflow and how to avoid overflow.
Example:
Perform the following binary addition in 2’s complement arithmetic. Determine whether there is any overflow. If there is an overflow, then discuss how to avoid it.
(a) -7 + 10
(b) -10 + 7
(c) 10 + 7
(d) -10 + -7
Solution:
(a) -7 + 10 = ?
The two numbers given are -7 and 10. In this case, 10 requires five bits to be represented in 2’s complement form (one bit for sign and four bits for magnitude), whereas -7 requires only four bits (one bit for sign and three bits for magnitude). So, we need to add one more sign bit to the left of the MSB of -7 to make it 5 bits.
| Important Rule for 2’s Complement Addition: We need to sign-extend one of the summands for proper summation. Both summands must have the same number of bits. |
The five-bit representation of both numbers are 10 = 01010 and -7 = 11001.
Here, ‘n’ is the number of bits in the representation. So, n = 5.
To figure out whether, there is any overflow or not, we will perform XOR operation between Cn and Cn-1, as shown below. If the value of the XOR operation is ‘0’, then there is no overflow; if the value is ‘1,’ then there is overflow.
Since, in the above case, the carries into and out of the MSB are the same, the XOR operation between C5 (carry out of MSB) and C4 (carry into MSB) is ‘0’; therefore, there is no overflow. The other way to detect the overflow is to check whether the sum lies within the range of numbers (that can be represented by the 5 binary bits) or not, as shown in the above example.
Note: To get the final sum, we need to discard the carry out as shown in the above figure that we have learned in the article “addition of 2’s complement signed binary numbers“.
(b) -10 + 7 = ?
The five-bit representation of both the numbers are -10 = 10110 and 7 = 00111.
In this example, there is no overflow as the result lies within the range.
(c) 10 + 7 = ?
The five-bit representation of both the numbers are 10 = 01010 and 7 = 00111.
Since, in the above case, the carries into and out of the MSB are different, so the XOR operation between C5 (carry out of MSB) and C4 (carry into MSB) is ‘1’; therefore, there is an overflow. It can also be observed that the sum does not lie within the range of numbers that can be represented by the 5 binary bits.
| Important Rule to Avoid Overflow: If the number of bits of the summands is n and m, then we need 1+ max(n,m) bits for the result to ensure no overflows. |
So in this example, to avoid overflow, we extended the summands by one more bit by adding another sign bit to the left of the MSB.
(d) -10 + -7 = ?
The five-bit representation of both the numbers are -10 = 10110 and -7 = 11001.
In this example, there is an overflow as the result lies outside the range. So, we will extend the bits of the summands to 6 bits.
The result is now free of overflow.
Reference: Oakland University, Digital Logic Design Course page.