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Japanese Chipmaker Rapidus Kicks Off 2nm Test Production: A Bold Step Toward 2027 Mass Production

Posted on July 20, 2025December 13, 2025 By vlsifacts No Comments on Japanese Chipmaker Rapidus Kicks Off 2nm Test Production: A Bold Step Toward 2027 Mass Production

In a major leap forward for Japan’s semiconductor industry, Rapidus Corporation has officially started test production of 2-nanometer (2nm) chips, marking a critical milestone in the country’s ambitions to reclaim its position as a global tech innovator. The Hokkaido-based startup, backed by billions in government funding and industry partnerships, has also announced that it will adopt single-wafer processing methods that are expected to revolutionize chip manufacturing efficiency and precision.

This move puts Rapidus squarely in the elite circle of chipmakers chasing sub-3nm technology — a space currently dominated by industry giants like TSMC, Intel, and Samsung. With eyes firmly set on entering volume production by 2027, Rapidus is claiming its stake in the future of ultra-advanced semiconductor fabrication.

Check out What is a Wafer in VLSI and TSMC’s Q2 Profit Soars 60% to Record Highs, Fueled by AI Boom: What’s Next for the Chip Giant?

Why 2nm Chips Matter?

The move to 2nm technology nodes isn’t just about getting smaller — it’s about making chips that are faster, more energy-efficient, and capable of supporting increasingly complex AI, data center, and edge computing applications. These chips will deliver breakthrough performance while significantly reducing power consumption — potentially extending battery life in smartphones and improving the energy efficiency of cloud infrastructure.

As global demand for semiconductors grows exponentially, the race to 2nm is not just about tech supremacy — it’s also about national security and economic resilience. By developing domestic capabilities, Japan seeks to reduce its dependency on foreign chip suppliers — a lesson underscored by recent global supply chain disruptions.

Rapidus’s Edge: Single-Wafer Processing

One of the most intriguing aspects of Rapidus’ strategy is its commitment to single-wafer processing, a method that prioritizes precision over speed. Unlike batch processing, which handles multiple wafers at once, single-wafer processing allows for much tighter process control, precision tuning, and lower defect rates — all of which are crucial when dealing with circuitry measured in nanometers. While industry leaders like TSMC and Intel use a mix of batch and single-wafer processing, Rapidus’ approach processes each wafer individually, enabling real-time defect detection and optimization. This could lead to higher yields and faster learning curves, though it comes with higher costs and slower throughput.

Representative Image

Why Single-Wafer Processing Matters?

The decision to adopt single-wafer processing across all stages—oxidation, ion implantation, patterning, etching, and more—sets Rapidus apart. This method allows engineers to collect extensive data from each wafer, using AI-driven tools like Design Manufacturing Co-Optimization (DMCO) to fine-tune production parameters. “This will enable us to measure the processing of individual wafers, learn from the results, and quickly feed the data back into the system,” said Henri Richard, president of Rapidus Design Solutions. The result? Potentially faster yield improvements and customized chips tailored for niche markets like AI and high-performance computing (HPC).

However, this approach isn’t without risks. Single-wafer processing is slower and more expensive than batch methods, which could challenge Rapidus’ ability to scale for mass production. Industry skeptics question whether Rapidus can compete with TSMC’s high-volume model, especially since TSMC plans to start 2nm production in 2025, two years ahead of Rapidus.

A National Effort Backed by Global Experts

Rapidus, founded in August 2022 with support from major Japanese firms like Toyota, Sony, and Denso, is on a mission to revive Japan’s once-dominant semiconductor industry. The company’s IIM-1 fab, a state-of-the-art facility near New Chitose Airport, began prototyping 2nm gate-all-around (GAA) transistor structures in April 2025, with initial wafers passing functionality tests by July 10. CEO Atsuyoshi Koike hailed this as a “significant milestone,” showcasing a 30cm wafer with gold-toned GAA transistors that meet performance expectations.

Rapidus’ progress is bolstered by a strategic partnership with IBM, which licensed its 2nm GAA technology to the Japanese startup. Since 2022, over 150 Rapidus engineers have worked at IBM’s Albany NanoTech Complex to refine this technology for commercial use. IBM’s Mukesh Khare emphasized the collaboration’s role in supporting Rapidus’ 2nm efforts, with plans to explore sub-1nm chips in the future.

Japan’s government has invested heavily, providing over ¥920 billion ($5.75 billion) in subsidies to ensure Rapidus’ success. This reflects broader geopolitical concerns about semiconductor supply chains, particularly the reliance on TSMC’s Taiwan-based fabs amid tensions with China. Rapidus’ IIM-1 fab, equipped with ASML’s advanced EUV lithography tools since December 2024, is a cornerstone of Japan’s push for chip independence.

Aiming for 2027: Challenges and Opportunities

Rapidus’ roadmap includes releasing its first process development kit (PDK) in Q1 2026, enabling customers to prototype designs. The company has already attracted interest from tech giants like Google, Apple, and AI startup Tenstorrent, signaling potential demand for its 2nm chips. However, challenges remain: achieving high yields, securing long-term customers, and closing the funding gap (estimated at ¥4 trillion) are critical hurdles.

The company’s focus on automation and advanced packaging, including chiplet and 3D integration, could give it an edge. Rapidus claims its fully automated fab could slash delivery times by up to 66% compared to competitors, a game-changer for AI-driven applications.

A Vision for Japan’s Tech Future

Rapidus’ journey is more than a corporate endeavor—it’s a national mission to reclaim Japan’s place in the global tech race. Chairman Tetsuro Higashi called the fab’s rapid construction “a rare feat,” noting that the cleanroom was completed in 2024, just a year after groundbreaking. With plans for a second 1.4nm fab if 2nm production succeeds, Rapidus is laying the groundwork for a “Hokkaido Valley” to rival Silicon Valley.

As Rapidus prepares for mass production in 2027, the world is watching. Can this Japanese startup disrupt the semiconductor industry and deliver on its promise of high-performance, energy-efficient 2nm chips? Only time will tell, but its bold strategy and early successes suggest Japan is back in the chipmaking game.

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News Tags:2027 mass production, 2nm chips, AI Chips, IBM, Intel, Japan chip industry, Rapidus, Semiconductor, single-wafer processing, TSMC

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