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Category: DHD

Digital Hardware Design

Mealy to Moore and Moore to Mealy Transformation

Posted on February 2, 2016May 18, 2025 By vlsifacts 12 Comments on Mealy to Moore and Moore to Mealy Transformation

Sequential machines can be designed in two different ways: (i) Mealy Machine & (ii) Moore Machine Considering Mealy or Moore for the designing of sequential machine, it’s actually difficult to draw a hard line where one machine is always better than the other. Depending on the application requirement one may dominate the other. It is…

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DHD, Digital Electronics

Mealy Vs. Moore Machine

Posted on February 1, 2016June 17, 2025 By vlsifacts 6 Comments on Mealy Vs. Moore Machine

Design of sequential circuit can be composed of designing combinational circuit and state register. Sequential circuits are implemented in two different ways: We can represent a sequential machine as M = <I,O,S,f,g>; where I: Input setO: Output setS: State spacef: A function mapping IxS = Og: A function mapping IxS = S Let’s understand both…

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DHD, Digital Electronics

Different Coding Styles of Verilog Language

Posted on January 31, 2016June 16, 2025 By vlsifacts 4 Comments on Different Coding Styles of Verilog Language

Verilog language has the capability of designing a module in several coding styles. Depending on the needs of a design, internals of each module can be defined at four level of abstractions. Irrespective of the internal abstraction level, the module would behave exactly in the similar way to the external environment. Following are the four…

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DHD, Verilog, Xilinx

Synopsys – Interview Questions – based on Synthesis and Simulation

Posted on January 19, 2016June 16, 2025 By Priyadarshi No Comments on Synopsys – Interview Questions – based on Synthesis and Simulation

This post contains some very interesting interview questions asked by Synopsys the EDA giant in its interview. The questions are based on Verilog Synthesis and Simulation. Though I have included the answers; I would encourage the reader to experiment himself or herself and then discuss these in the forum. 1. How a latch gets inferred…

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DHD, Digital Electronics, Interview, Interview Experience, Verilog

Case and Conditional Statements Synthesis CAUTION !!!

Posted on November 12, 2015June 16, 2025 By Priyadarshi 5 Comments on Case and Conditional Statements Synthesis CAUTION !!!

Case and Conditional Statements are available in both VHDL and Verilog. These are considered as significant features of behavioral modelling, be it in VHDL or Verilog. Behavioral modelling provides high level abstraction so that the circuit can be designed by programming its functionality. Let’s say, we have to design a circuit that selects a particular…

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DHD, Digital Electronics, Verilog

Circuit Design of a 4-bit Binary Counter Using D Flip-flops

Posted on November 5, 2015June 16, 2025 By vlsifacts 22 Comments on Circuit Design of a 4-bit Binary Counter Using D Flip-flops

Problem Statement: Design a circuit for an edge triggered 4-bit binary up counter (0000 to 1111). When it reaches “1111”, it should revert back to “0000” after the next edge. Use positive edge triggered D flip-flop (shown in the below figure) to design the circuit. Pin Input / Output Description D Input Data Input CLK…

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Digital Electronics

Difference between Latch and Flip-Flop

Posted on November 4, 2015June 16, 2025 By Gautam 6 Comments on Difference between Latch and Flip-Flop

Flip-Flop (FF) and Latch are digital electronic circuits that are used to store information in bits as they have two stable states. One FF or latch can store 1 bit of information. FF is a circuit that can be made to change its state by applying signals to one or more control inputs and will have…

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Digital Electronics

Difference between Combinational and Sequential logic circuits.

Posted on October 27, 2015June 16, 2025 By Dewansh 24 Comments on Difference between Combinational and Sequential logic circuits.

Combinational and Sequential circuits are the most essential concepts to be understood in digital electronics. Sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on the sequence of past inputs. Combinational Logic Circuits Sequential Logic Circuits Output is a function of the…

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Digital Electronics

Power Analysis in XILINX Xpower Analyzer

Posted on August 27, 2015June 16, 2025 By Priyadarshi 7 Comments on Power Analysis in XILINX Xpower Analyzer

These are some simple steps which can be used to do the power analysis of a design using Xpower Analyzer which comes readily available in the ISE free web pack. ## Make sure your circuit can be synthesized. Then under the implement design option in the project navigator, Place and Route the design. ## The…

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DHD, Xilinx

Verilog vs VHDL

Posted on July 20, 2015June 23, 2025 By Dewansh No Comments on Verilog vs VHDL

Verilog and VHDL are Hardware Description languages (HDL) that are used to describe the behavior and structure of electronic systems. HDL languages are different form software language like ‘C’, as they use concurrency constructs to simulate circuit behavior. HDL includes a means of describing propagation time and signal strength. Verilog Vs. VHDL

DHD, Verilog, VHDL

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