Synthesis transforms the simple RTL design into a gate-level netlist with all the constraints as specified by the designer. In simple language, Synthesis is a process that converts the abstract form of design to a properly implemented chip in terms…
Author: Dewansh
Getting started with TLM 2.0 – Introduction and Basic Constructs
The TLM 2.0 transaction level modeling standard from the Open SystemC Initiative (OSCI) was released on 9th June 2008. Transaction-level modeling (TLM) is a high-level modern approach to modeling digital systems. That modeling is based on the abstraction of the…
What is TLM-1 and what was the need for TLM 2.0?
Transaction-level modeling (TLM) is a high-level modern approach for modeling digital systems. TLM-1 standard defined a set of interfaces which could be used for transporting transaction by value or reference. TLM-1 is being used successfully in some applications but it…
Telephonic Interview Experience – STMicroelectronics
Hey Everyone. This is my telephonic interview experience at STMicroelectronics for the position of an intern. I received a called from STM in the morning. I greeted the interviewer with a good morning and the interview started with asking about…
Wipro Limited – Technical Interview Question Bank – Part 2
Wipro Limited Technical Interviews Question Bank continued from Part-1 Q. What is the difference between authorization and authentication, for example when you enter your card details while net banking? Ans. A user is first authenticated, i.e. identity of the user…
Wipro Limited – Technical Interview Question Bank – Part 1
Q. What is inheritance in Java? Ans. Inheritance is when a class inherits the properties of another class. The class which inherits is called the child class and the class from which the properties are inherited is called the parent…
Blocking (immediate) and Non-Blocking (deferred) Assignments in Verilog
There are Two types of Procedural Assignments in Verilog. Blocking Assignments Nonblocking Assignments To learn more about Delay: Read Delay in Assignment (#) in Verilog Blocking assignments Blocking assignments (=) are done sequentially in the order the statements are written. A second…
FPGA vs. Microcontroller
FPGA stands for Field Programmable Gate Array. They are programmable integrated circuits made up of a large number configurable logic blocks (CLBs), fixed function blocks and memory blocks which can be used to perform complex digital computations. The CLBs are…
Training Experience – Mentor Graphics Higher Education Program
Hello Everyone! This is my training experience, I had at Mentor Graphics, Noida (Higher Education Program) which is conducted annually for pre-final year B.Tech and M.Tech students. It is a two month training program that starts in June and lasts…
Difference between Combinational and Sequential logic circuits.
Combinational and Sequential circuits are the most essential concepts to be understood in digital electronics. Combinational logic (sometimes also referred to as time-independent logic) is a type of digital logic which is implemented by Boolean circuits, where the output is…