Skip to content

VLSIFacts

Let's Program the Transistors

  • Home
  • DHD
    • Digital Electronics
    • Fault Tolerant System Design
    • TLM
    • Verification
    • Verilog
    • VHDL
    • Xilinx
  • Embedded System
    • 8085 uP
    • 8086 uP
    • 8051 uC
  • VLSI Technology
    • Analog Electronics
    • Memory Devices
    • VLSI Circuits
  • Interview
    • Interview Experience
    • Training Experience
    • Question Bank
  • Notifications
  • QUIZ
  • Community
  • Job Board
  • Contact Us

Tag: State Reduction

State Equivalence & Minimization Part – 2

Posted on February 10, 2016June 17, 2025 By vlsifacts 1 Comment on State Equivalence & Minimization Part – 2

The states which are equivalent, are redundant. Because by looking at the output, we can not even figure out in which state the machine is in. So, if there are two equivalent states then there is no point of using both the states. We can merge both the states and can use only one state….

Read More “State Equivalence & Minimization Part – 2” »

DHD, Digital Electronics

Top Posts & Pages

  • ASCII Code
  • AND and OR gate using CMOS Technology
  • NAND and NOR gate using CMOS Technology
  • Circuit Design of a 4-bit Binary Counter Using D Flip-flops
  • Difference between $display, $monitor, $write and $strobe in Verilog

Copyright © 2025 VLSIFacts.

Powered by PressBook WordPress theme

Subscribe to Our Newsletter