Interview Experience – Silicon Interfaces – for Trainee VLSI Design (Off Campus)

Hello everyone !!!
This is my interview experience for the post of Trainee VLSI design at Silicon Interfaces, A software and VLSI Design centre. This post also presents my thoughts towards “What should be done to get noticed by VLSI companies“. This article would be of great assistance to those, who are vouching to make a career in the VLSI Industry.

I got an Interview call from Silicon Interfaces after I submitted my resume on their website. The letter said that there would be an Aptitude test then a Technical test followed by a Tech Interview and then finally HR review and discussions.

Round -1: Aptitude Test

The Aptitude test consisted of the general Aptitude questions divided in the segments of Quantitative, LR(Logical Reasoning), DI(Data Interpretation). This test contained general questions. Though prior practice was needed, preparations from known sources like India Bix or R.S Agarwal is fine enough.

Round – 2: Technical Test

Aptitude round was followed by the Technical test round. This test consisted of basic digital questions regarding Boolean algebra, De-Morgan theorem, Combinational and Sequential Circuits. Generally questions were based on functioning of Flip Flops and latches, difference between FF and latch, Counters (both ripple and synchronous), Shift registers etc. This test was primarily to check the fundamentals and a little bit of design approach. For preparations one can use sources on web – there are many online resources available, for a specific name I used “India Bix“. For those who are interested in front-end VLSI design, I would say, take Digital Design by Morris Mano as the Bible and start reading.

Round – 3: Technical Interview

This test was followed by a Tech interview. The Interviewer looked like an experienced person but was calm and Interactive. He began with asking about my self and my experiences in the VLSI field.

Then he asked me to tell him about “Critcal frequency“. I explained critical frequency relating it with the problem in the circuits due to the set up and hold time in the FFs. Meanwhile he continued to glance at my resume and after I stopped answering he asked me about my projects. He inquired about the project which I mentioned as my best project, the tools used for the project and the technology on which I worked upon.

Then he came to the most critical topic of the whole Interview, about HDLs. in my case he started asking Verilog as it was clearly mentioned in my resume that I know both VHDL and Verilog. He asked me to write a code for the clock generator, He made that code run on a simulator and then asked me if he would change blocking statements to non-blocking, then what will happen etc. He asked me about sensitivity lists.

Then he asked if I have to check my results without observing waveforms what should I do. I stuck at this question. He humbly gave a hint about $monitor and asked me the functioning.

After that the interview shifted towards more informative questions like, “to what extent I have used linux“, “If given a system whether I would be able to work on it or not“, to that I replied that I could learn and then can easily work. He asked me about my previous experiences in the field of Training, Freelancing etc. and about the tools I have used.

Then he asked me a tricky question about checking the parity of a single bit, which I answered and explained my logic. There was a bit of a confusion regarding my answer to the question, but he let that go and asked me to wait further. The circumstances and his instructions for me to wait were clearly indicating that I am almost through 🙂

Round – 4: HR Discussion

The HR discussion was regarding salary, company policies, work hours etc. and when i agreed to the terms, I got my offer letter as a Trainee- VLSI Design 🙂

At the end, I would like to suggest any aspirant who is keen to make a career in the VLSI industry, to focus on number of quality projects done by himself/herself as these add a significant amount of experience in your profile and enhance your knowledge like no other means. Certified training in Verilog/VHDL or System Verilog or both would not be that effective until it is backed by your work done. And that can be achieved only by doing quality projects. In your resume list the tools you are handy with and be illustrative about your knowledge on listed tools, technologies etc. so that your work can be noticed.

Priyadarshi Saxena