This is my interview experience for the post of Associate Telecom Engineer at Wipro Limited. Wipro visited our campus (JIIT Noida) for the first time to hire electronic students for their telecom domain. The selection procedure consisted of four parts:…
Author: Dewansh
Verilog vs VHDL
Verilog and VHDL are Hardware Description languages (HDL) that are used to describe the behavior and structure of electronic systems. HDL languages are different form software language like ‘C’, as they use concurrency constructs to simulate circuit behavior. HDL includes…
Advantages and Disadvantages of a Dynamic CMOS Circuit over a Static CMOS Circuit
Static CMOS circuits use complementary nMOS pulldown and pMOS pullup networks to implement logic gates or logic functions in integrated circuits. Dynamic gates use a clocked pMOS pullup. The implemented logic function or the logic gate is achieved through 2…