Mentor Graphics Job Board
Position: Verification IP Engineer
Location: Noida
Educational Qualification: B.tech/B.E ,M.Tech/M.E in Electronics.(From Premier Institutes)
Essential Experience in Years: FRESHERS
Job Description:
Be an integral part of a team that is developing comprehensive verification IPs for interfaces such as PCIe Gen4/Gen5, USB3.2, 400Gigabit Ethernet, DDR5, LPDDR5 and leading coherency protocols like CCIX for use with Questa RTL simulation.
- Questa verification IP’s help design teams find more bugs in less time than conventional simulation techniques.
- You will specify, implement, test and enhance these verification components for a wide range of end user applications.
- You will interact with TMEs and Field AEs or directly with customers to deploy or resolve customer issues
Job Qualifications:
- B.Tech/ M.Tech in electrical/ electronics engineering or related field from reputed institute
- Sound knowhow of System Verilog for testbench with exposure to verification methodologies like UVM, VMM etc.
- Intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc.
- Experience in verification engineering.
How to apply: share resumes to Shreemant_Vats@mentor.com
Last date for application: 4-June-2019
Written Test : 7th June’19
Test Venue : Noida, Bangalore, Hyderabad Mentor office.