A “module” is the basic building block in Verilog. A module can be an element or a collection of lower-level design blocks. A module provides the necessary functionality to the higher-level block through its port interface (inputs and outputs), but…
Author: Sidhartha
State Equivalence & Minimization Part – 2
The states which are equivalent, are redundant. Because by looking at the output, we can not even figure out in which state the machine is in. So, if there are two equivalent states then there is no point of using…
State Equivalence & Minimization Part – 1
Sometimes a state diagram constructed for a finite state machine contains redundant states, i.e. states whose function can be accomplished by other states. The number of memory elements required for the realization of a machine is directly related to the…
State Machine Diagram for Parity Generator
Parity generator can be of two types: (i) Even Parity Generator (ii) Odd Parity Generator In this post we will derive the state machine for an even parity generator. Consider input “I” is a stream of binary bits. When an…
Circuit Design of a Sequence Detector
This post illustrates the circuit design of Sequence Detector for the pattern “1101”. State Machine diagram for the same Sequence Detector has been shown below. Click here to realize how we reach to the following state transition diagram. Click here to…
State Machine Diagram for Pattern Recognition / Sequence Detector
Sequence Detector is a digital system which can detect/recognize a specified pattern from a stream of input bits. Let’s say the Sequence Detector is designed to recognize a pattern “1101”. Consider input “X” is a stream of binary bits. When…
State Machine Synthesis
State machine synthesis is a process of of boiling down a state machine to a digital logic circuit. Steps in State Machine Synthesis Convert the description into state machine Find out the equivalent states and minimize the state machine Encode…
Truth Tables, Characteristic Equations and Excitation Tables of Different Flipflops
Flipflops to be considered are: SR Flipflop JK Flipflop D Flipflop T Flipflop SR Flipflop Truth Table S R Q(t+1) 0 0 Q(t) 0 1 0 1 0 1 1 1 Invalid inputs Characteristic Equation Q(t+1) = R'(t)Q(t) + S(t)…
Mealy to Moore and Moore to Mealy Transformation
Sequential machines can be designed in two different ways: (i) Mealy Machine & (ii) Moore Machine Considering Mealy or Moore for the designing of sequential machine, it’s actually difficult to draw a hard line where one machine is always better…
Mealy Vs. Moore Machine
Design of sequential circuit can be composed of designing combinational circuit and state register. Sequential circuits are implemented in two different ways: Mealy Machine Moore Machine We can represent a sequential machine as M = <I,O,S,f,g>; where I: Input set…